The invention relates to data allocation methods, and more particularly, to methods for memory space allocation.
In conventional integrated circuit (IC) design, pins serve as signal interfaces for data transmission in chips. Typically, the size of a data bus is proportioned to the number of pins thereof. A Small Computer System Interface (SCSI) bus, for example, comprises sixty-eight pins, while an Industry Standard Architecture (ISA) bus comprises forty pins. Each pin is assigned a temporary memory space, such as a buffer or register, for data storage, and each temporary memory space has a fixed size.
FIG. 1 is a schematic diagram of memory space configuration in conventional IC design. A chip 10 comprises a data configuration module 110 and a plurality of pins 130. Data configuration module 110 comprises a control unit 111 and a plurality of memory spaces 113 corresponding to pins 130 respectively. Each memory space has the same fixed memory size. Control unit 111 receives data through a pin 130 and then temporarily stores the data in a memory space 113 corresponding to the pin. Further, control unit 111 can temporarily store data in a memory space 113 and then delivers the data out through a pin 130 corresponding to the memory space.
As described above, each memory space has the same memory size. When a large amount of data is obtained through a pin, the capacity of a corresponding memory space may be exceeded. In addition, when a small amount or no data is obtained through a pin, the corresponding memory space remains unoccupied that is insufficient. Thus, a method for efficient allocation of memory space is desirable.